Digital Lock in Logisim-evolution

A digital combination lock is one of the most popular digital-design course projects: the circuit stays locked until the user enters the correct digit sequence (say, 3-1-4), then it asserts an unlocked signal. It is a finite-state machine, so the same ideas from our sequence detector tutorial apply here.

Design: states as “how many digits are right so far”

For a 3-digit code you need four states: LOCKED (0 correct), S1 (1 correct), S2 (2 correct), and UNLOCKED. Two D flip-flops encode the four states — see flip-flops if you need a refresher.

1. Input: a 2-bit (or 4-bit) keypad value plus an “enter” button. Use input pins or buttons from the Input/Output library.
2. State register: two D flip-flops holding the current state, updated on the clock edge.
3. Next-state logic: combinational logic (gates or a ROM) that computes the next state from {current state, entered digit}. Correct digit advances the state; a wrong digit sends the machine back to LOCKED.
4. Output logic: the UNLOCKED state drives an LED or a 7-segment “OPEN” indicator. Add a manual reset button wired to the flip-flops’ asynchronous clear.

Tips that save you debugging time

• Debounce in simulation: drive the “enter” signal from a button and advance the clock with Ctrl+T (manual tick) so each press registers exactly once.
• Watch the state encoding: probe the two state bits directly — most “my lock never unlocks” bugs are a wrong next-state row, not wiring.
• Start with a 2-digit code to keep the truth table small, then extend to 3 or 4 digits once it works.

Want a bigger challenge next? The traffic light controller and vending machine are the other classic FSM projects.