SR, D, JK and T Flip-Flops in Logisim-evolution
Combinational circuits forget everything the moment inputs change. Flip-flops give your circuit memory: one bit that holds its value until the clock says otherwise. They are the foundation of every counter, register, and state machine you will build. Logisim-evolution ships all four classic types in the Memory library.
| Type | Inputs | What it does |
|---|---|---|
| SR | S, R | Set / Reset. S=1 stores 1, R=1 stores 0. S=R=1 is invalid. |
| D | D | Data. On the clock edge, Q becomes D. The workhorse of registers. |
| JK | J, K | Universal. J=K=1 toggles the output — no invalid state. |
| T | T | Toggle. T=1 flips the bit each clock; T=0 holds. |
Using the built-in flip-flops
Building an SR latch from gates
Before using the ready-made parts, every digital-logic course asks you to build one from scratch: cross-couple two NOR gates (Gates library) so each gate’s output feeds the other’s input. Label the inputs S and R. You have just built memory out of pure combinational logic — and you can see exactly why S=R=1 is forbidden (both outputs fight to 0).
Common pitfalls
- Asynchronous preset/clear misuse. The built-in flip-flops have async set/reset pins that act immediately, ignoring the clock. If your counter behaves erratically, check you did not leave an async pin floating or tied wrong.
- Race conditions. In feedback-heavy sequential circuits, always clock your memory elements from the same clean clock — the official guidance is simple: always clock the memories.
- Red wires around flip-flops usually mean conflicting drivers or an unconnected pin. See our troubleshooting guide.
Go further
Chain D flip-flops into shift registers, bundle them into registers, or drive a sequence detector state machine with them.
