Parity Generator and Checker in Logisim-evolution

Parity bits are the simplest form of error detection: one extra bit records whether the number of 1s in your data is even or odd. Building the generator and checker is a standard lab exercise, and it is an excellent first project with XOR gates.

How it works

• Even parity generator: XOR all data bits together. The output is the parity bit — it is 1 exactly when the data has an odd number of 1s, making the total (data + parity) even.
• Odd parity generator: same XOR tree, then invert the output.
• Checker: at the receiving end, XOR the data bits plus the received parity bit. For even parity the result must be 0; a 1 means a bit flipped in transit — light an “ERROR” LED.

Build it (4-bit example)

1. Place four input pins (D3…D0) and cascade three XOR gates: ((D3 ⊕ D2) ⊕ D1) ⊕ D0. The final output is the even-parity bit P.
2. For the checker on the same canvas, XOR D3…D0 and P together (four XORs in a tree). Connect the result to an LED labeled ERROR.
3. Test plan: try data 1011 (three 1s → P=1, ERROR=0), then flip one bit to simulate corruption (1001 with P still 1 → ERROR=1).
4. Extension: widen to 8 bits with an 8-input XOR gate, or generate odd parity with a final NOT gate.

What parity can and cannot do

Be honest in your lab report: single-bit parity detects one flipped bit but cannot correct it, and two flipped bits cancel out and go unnoticed. That limitation is exactly why real systems moved to Hamming codes and CRCs — a good closing sentence for your write-up.